Ettus USRP B200 with Enclosure kit at MG Super Labs India

The USRP B200 provides a fully integrated, single board, Universal Software Radio Peripheral platform with continuous frequency coverage from 70 MHz –6 GHz. Designed for low-cost experimentation, it combines a fully integrated direct conversion transceiver providing up to 56MHz of real-time bandwidth, an open and reprogrammable Spartan6 FPGA, and fast and convenient bus-powered SuperSpeed USB 3.0 connectivity. Full support for the UHD (USRP Hardware Driver) software allows you to immediately begin developing with GNU Radio, prototype your own GSM base station with OpenBTS, and seamlessly transition code from the B200 to higher performance, industry ready USRP platforms. An enclosure accessory kit allows users of green PCB devices (revision 6 or later) to assemble a protective steel case.

Experiment with the USRP B200 across a wide range of applications including: FM and TV broadcast, cellular, GPS, WiFi, ISM, and more. Users can immediately begin prototyping in GNURadio and participate in the open-source SDR community. Full support by the USRP Hardware Driver™ (UHD) software allows seamless code reuse from existing designs, compatibility with open-source applications like HDSDR and OpenBTS, and an upgrade path to industry-ready USRP systems to meet application requirements.

The integrated RF frontend on the USRP B200 is designed with the Analog Devices AD9364, a single chip direct conversion transceiver and digital baseband processor, capable of streaming up to 56 MHz of real-time RF bandwidth. The B200 utilizes one signal chain of the AD9364 allowing it to be bus powered and reducing software and hardware design complexity. Onboard signal processing and control of the AD9364 is performed by a Spartan-6 XC6SLX75 FPGA connected to a host PC using SuperSpeed USB 3.0. The USRP B200 real time system throughput is benchmarked at 61.44MS/s quadrature providing the full 56 MHz of instantaneous RF bandwidth to the host PC for additional processing using GNU Radio SDR design environment.

RF Specifications	Xilinx Spartan-6 XC6SLX75 FPGA Channels: 1 TX & 1 RX, Half or Full Duplex Frequency range: 70 MHz to 6 GHz Instantaneous Bandwidth: up to 56 MHz SSB/LO Suppression: .35/50 dBc 3.5 GHz deg RMS 6 GHz deg RMS IIP3 (at typical NF): .20 dBm Power Output: >10 dBm Receive Noise Figure: <8 dB
Conversion Performance and Clocks	ADC Sample Rate (Max.): 61.44 MS/s ADC Resolution: 12 bits ADC Wideband SFDR: 78 dBc DAC Sample Rate (Max.): 61.44 MS/s DAC Resolution: 12 bits Host Sample Rate (16b): 61.44 MS/s Frequency Accuracy: ±2.0 ppm W/ GPS Unlocked TCXO Reference: ±75 ppb W/ GPS Locked TCXO Reference: <1 ppb
Power	USB bus powered
Physical	Grounded mounting holes USB 3.0 SuperSpeed interface Standard USB 3.0 connector Dimensions: 97 x 155 x 15 mm Weight: 350 g
Environment	Operating Temp. Range: 0 - 45 °C USRP Hardware Driver 3.9.2 (or later) GNU Radio, C++ and Python APIs
Synchronization	10 MHz clock reference PPS time reference
Product Compliance	HTC: 8471809000 ECCN: 3A992.a