The PYNQ-Z1 board is designed to be used with PYNQ, a new open-source framework that enables embedded programmers to exploit the capabilities of Xilinx Zynq All Programmable SoCs (APSoCs) without having to design programmable logic circuits. Instead, the APSoC is programmed using Python and the code is developed and tested directly on the PYNQ-Z1. The programmable logic circuits are imported as hardware libraries and programmed through their APIs in essentially the same way that the software libraries are imported and programmed.
The PYNQ-Z1 board is the hardware platform for the PYNQ open-source framework. The software running on the ARM A9 CPUs includes:
For designers who want to extend the base system by contributing new hardware libraries, Xilinx Vivado WebPACK tools are available free of cost.
To find out more about PYNQ, please see the project webpage at www.pynq.io. Here you will find materials to help you get started and a forum for contacting the supporting community.
To use the PYNQ framework - it's required to have the PYNQ-Z1 boot image, which is available from the PYNQ-Z1 Resource Center. You can download the PYNQ-Z1 image and copy it to a microSD card, or purchase a card preloaded with the image.
What can you do with the PYNQ-Z1?
The PYNQ-Z1 board is a general purpose, programmable platform for embedded systems. Users can customize both its hardware and software for applications as diverse as:
The PYNQ-Z1 natively supports multi-media applications with on-board audio and video interfaces. It is designed to be easily extensible with Pmod, Arduino, and Grove peripherals, as well as general purpose IO pins.
The PYNQ-Z1 board can be also expanded with USB peripherals including WiFi, Bluetooth, and Webcams.
ZYNQ XC7Z020-1CLG400C:
650MHz dual-core Cortex-A9 processor
DDR3 memory controller with 8 DMA channels and 4 high performance AXI3 slave ports
High-bandwidth peripheral controllers: 1G Ethernet, USB 2.0, SDIO
Low-bandwidth peripheral controller: SPI, UART, CAN, I2C
Programmable from JTAG, Quad-SPI flash, and microSD card
Artix-7 family programmable logic
13,300 logic slices, each with four 6-input LUTs and 8 flip-flops
630 KB of fast block RAM
4 clock management tiles, each with a phase-locked loop (PLL) and mixed-mode clock manager (MMCM)
220 DSP slices
On-chip analog-to-digital converter (XADC)
Switches, push-buttons, and LEDs:
4 push-buttons
2 slide switches
4 LEDs
2 RGB LEDs
Expansion Connectors:
Two standard Pmod ports
16 Total FPGA I/O
Arduino/chipKIT Shield connector
49 Total FPGA I/O
6 Single-ended 0-3.3V Analog inputs to XADC
4 Differential 0-1.0V Analog inputs to XADC
For all other material: